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METAPHORICAL STUDY OF REVERSIBLE LOGIC GATES

Shweta Agrawal

In today’s world power dissipation is the main problem in digital world; this problem can be reduced by using reversible logic gates. For high performance systems, low power and smaller area are the most important criteria. Area and speed are main factors which are conflicting i.e. if speed is improving it results in larger area, hence in this paper reversible logic gates are analyzed. The power dissipation by these gates is very low; ideally their internal power dissipation is zero because these gates do not loss information. Systems where low power dissipation is required reversible logic gates will be used in place of classical logical gates like AND, OR, NAND, NOR. Reversible logic provides an alternative that may overcome many of these problems in the future. By reducing the number of reversible logic gates one can minimize the quantum cost of these gates. Reversible logic finds its application in low power CMOS, quantum computing, nanotechnology, bio-information etc