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Feed Through Logic with Improved Power- Delay Product

Sandeep Sangwan, Jyoti Kedia

In this paper the design of feedthrough logic with improved power-delay product is presented. Feedthrough logic (FTL) is a logic design technique of the dynamic logic family. This technique solves the problems of Domino logic such charge sharing and use of inverter at the output of every stage while cascading. The proposed circuit reduces the power dissipation of the existing high speed feedthrough circuit by 30.5% for the chain of 5 inverters. The circuit is simulated in Cadence tools using 180 nm technology library.