Parul Sharma, Mrs J.Manjula
This paper presents a low power mixer for an RF Receiver front end, which is designed and simulated in 0.18μm CMOS technology. Using CMOS process, low power and high integrated RF front end circuits can be designed for high frequency operation. Mixer plays a vital role in the transceiver design for converting LF to RF in transmitter section and RF to IF in receiver section. High gain, low power, better linearity and low noise figure are the designing challenges of mixer. In this paper in order to achieve low output noise and low noise figure current reuse technique are used in Gilbert double balanced mixer. The obtained consumes low power of 0.2W. It also achieve low noise figure of 3dB.