சுருக்கம்

Active Noise Control Using Field Programmable Gate Arrays

Peter Gaikwad, Mayank Jain, Pranita Yevle, S. U. Bhandari

This research paper is an attempt to study the active noise controlling techniques using FPGA. The conventional passive methods of noise control prove to be very prominent at higher frequencies but their overall efficiency becomes low as frequency decreases. An approach of tuned filter is used to compensate this drawback but it has the limitation of offset and poor sensitivity. Many methods have been developed using the digital signal processor (DSP) and micro-processors. All these system employ Active Noise Control (ANC) technique to do so. These methods face a major challenge of coping up with the speed of the system with the real time signals. The delay is mainly due to the inherent frequency of the system and complex algorithm like least mean square (LMS) used in the process which demands high computational environment. This need for the speed can be provided by the implementations of hardwired systems. Also the mass- production can significantly bring down the cost of the system. Field programmable gate array (FPGA) implementation can increase the time efficiency and also the reliability of the system.