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A New Reversible 'SMT' Gate and its Application to Design Low Power Circuits

Monika Tiwari, G.R. Mishra , O.P.Singh

Reversible logic concept gaining much attention of researchers due to its characteristics of generating loss-less system. Reversible logic technology do not erase information hence no heat dissipation. In this paper a new reversible SMT logic gate has been proposed .The proposed three inputs, three outputs reversible logic based SMT gate has designed for Logical, Boolean and Arithmetical functions. This gate needs only one clock cycle to perform multifunctional operation and produce no garbage output. In the present investigation reversible half adder and half subtractor gate has been successfully realized by SMT gate. It produces zero garbage outputs. The proper coding proves that the proposed gates are fulfilling the requirement of reversible logic gate. In present paper different properties of SMT gate has been simulated using VHDL.