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A Low Power Pipelined FFT/IFFT Processor for OFDM Applications

M. Jasmin

To produce multiple subcarriers orthogonal frequency division multiplexing (OFDM) often require an inverse fast Fourier transform (IFFT).This paper, present the efficient implementation of a pipeline FFT/IFFT processor for OFDM applications. This design adopts a single-path delay feedback style as the proposed hardware architecture. To eliminate the read-only memories (ROM’s) used to store the twiddle factors, the proposed architecture applies a reconfigurable complex multiplier and bit-parallel multipliers to achieve a ROM-less FFT/IFFT processor, thus consuming lower power than the existing works